Mostafa Chinichian
Lecturer
Phone: 805-756-2149
E-mail: mchinich@calpoly.edu
Office: 20-208
Homepage
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Course Schedule - Fall 2009
| Course | Section | Date/Time | Room |
|---|---|---|---|
| Electric Circuit Analysis I | EE 112-03 |
Monday, Wednesday
1:10 p.m.-2 p.m. |
Room: 186-C201 |
| Electric Circuit Theory | EE 201-01 |
Monday, Wednesday, Friday
8:10 a.m.-9 a.m. |
Room: 010-0124 |
| Electric Circuit Theory | EE 201-02 |
Monday, Wednesday, Friday
9:10 a.m.-10 a.m. |
Room: 010-0124 |
| Electric Circuit Theory | EE 201-03 |
Monday, Wednesday, Friday
11:10 a.m.-noon |
Room: 010-0126 |
| Electronics Laboratory | EE 361-02 |
Tuesday
3:10 p.m.-6 p.m. |
Room: 020-0149 |
Bio
Mostafa Chinichian studied all of his education, both undergraduate and graduate in Electrical Engineering. Receiving his Ph.D. at FIT (Florida Institute of Technology) in 1986, P.E. & M.Sc. at GWU (The George Washington University) in 1980 and 1977 respectively, and B.Sc. at Tehran Polytechnic University in 1975. Prior to coming to Cal Poly, he spent 4 years on the faculty of the Department of Electrical Engineering at Purdue University in Fort Wayne, Indiana.
Teaching and Research Interests
Error Control Coding, Digital Communications, and Satellite Communications
Resources
- Website: Courses