Mostafa Chinichian

Lecturer

Phone: 805-756-2149
E-mail: mchinich@calpoly.edu
Office: 20-208
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Course Schedule - Fall 2017

Course Section Date/Time Room
Electric Circuit Theory EE 201-01 Monday, Wednesday, Friday
8:10 a.m.-9 a.m.  
Room: 010-0126 
Electric Circuit Theory EE 201-05 Monday, Wednesday, Friday
3:10 p.m.-4 p.m.  
Room: 010-0124 
Electric Circuit Theory EE 201-08 Monday, Wednesday, Friday
10:10 a.m.-11 a.m.  
Room: 186-C200 
Electric Circuit Analysis Laboratory II EE 241-01 Tuesday
6:10 p.m.-9 p.m.  
Room: 020-0112 
Electric Circuit Analysis Laboratory II EE 241-06 Thursday
3:10 p.m.-6 p.m.  
Room: 020-0112 
Electric Circuit Analysis Laboratory II EE 241-07 Thursday
6:10 p.m.-9 p.m.  
Room: 020-0112 

Bio

Mostafa Chinichian studied all of his education, both undergraduate and graduate in Electrical Engineering. Receiving his Ph.D. at FIT (Florida Institute of Technology) in 1986, P.E. & M.Sc. at GWU (The George Washington University) in 1980 and 1977 respectively, and B.Sc. at Tehran Polytechnic University in 1975. Prior to coming to Cal Poly, he spent 4 years on the faculty of the Department of Electrical Engineering at Purdue University in Fort Wayne, Indiana. He has published 12 papers. His research interests include error control coding, digital and analog communication systems, digital and adaptive filters, and digital signal processing. In 1995, he received a Summer Research Program Fellowship at Griffiss Air Force Base Laboratory in Rome, New York, and he has been awarded a $30,000 contract from the U.S. Air Force Office of Scientific Research. Professor Chinichian was awarded a 1997 NASA/ASEE Summer Faculty Fellowship at the Jet Propulsion Laboratory of the California Institute of Technology to conduct research on turbo coding and optical channels. He is an active member of the SLO IEEE subsection.

Teaching and Research Interests

Error Control Coding, Digital Communications, and Satellite Communications

Resources

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