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Albert Liddicoat

Albert Liddicoat

Professor Albert Liddicoat
Currently Assigned as Associate Vice Provost


Phone: 805-756-5217
Email: aliddico@calpoly.edu
Office: 01-314

Fall 2020 Schedule
 

Time Monday Tuesday Wednesday Thursday Friday
8:10-8:30 AM          
8:40-9:00 AM          
9:10-9:30 AM          
9:40-10:00 AM          
10:10-10:30 AM          
10:40-11:00 AM          
11:10-11:30 AM          
11:40 AM-12:00 PM          
12:10-12:30 PM          
12:40-1:00 PM          
1:10-1:30 PM          
1:40-2:00 PM          
2:10-2:30 PM          
2:40-3:00 PM          
3:10-3:30 PM          
3:40-4:00 PM          
4:10-4:30 PM          
4:40-5:00 PM          
5:10-5:30 PM          
5:40-6:00 PM          
6:10-6:30 PM          
6:40-7:00 PM          
7:10-7:30 PM          
7:40-8:00 PM          
8:10-8:30 PM          
8:40-9:00 PM          
9:10-9:30 PM          
9:40-10:00 PM          

Biography

In 2002 Dr. Albert Liddicoat joined the Cal Poly faculty and is the Forbes Professor of Computer and Electrical Engineering.  Dr. Liddicoat received the Professional Achievement Award from the Cal Poly College of Engineering in 2003 and he is a Senior Member of the Institute of Electrical and Electronic Engineers.  In 2006, Dr. Liddicoat was appointed as the Assistant Vice President for Academic Personnel at Cal Poly and later became the Vice Provost for Academic Affairs and Personnel.  Dr. Liddicoat earned a degree in Electronic Engineering from Cal Poly, San Luis Obispo and later his M.S. and Ph.D. degrees in Electrical Engineering and a M.S. degree in Engineering Management from Stanford University. 

Dr. Liddicoat developed and taught several graduate courses and labs in Computer Engineering and Digital Systems.  Research from this activity has led to many presentations and publications in the areas of network protocol hardware acceleration, computer architecture, computer arithmetic, self-timed circuits, low power circuits and encryption hardware. 

His research group received funding and support from NSF, NASA JPL, Office of Naval Research, IBM, Lockheed Martin, Raytheon, ViaSat, Hitachi Global Storage Technologies, and other sources to conduct research on high performance computation, encryption, network protocol acceleration, Disruption Tolerant Networks (DTN), deep space link emulation, and other digital, computing and embedded system applications.   

Teaching and Research Interests

  • Computer Arithmetic and Architecture
  • Delay Tolerant Networks
  • Reconfigurable Computing
  • Embedded Systems
  • Digital, Microprocessor & Microcontroller System Design

Courses Taught

  • CPE 100 Computer Engineering Orientation (1 unit).
  • CPE 129 Digital Design (3 units).
  • CPE 219 Logic and Switching Circuits (3 units).
  • CPE 259 Logic and Switching Circuits Laboratory (1 units).
  • CPE 336 Microprocessor System Design Lecture and Laboratory (4 units).
  • CPE 329 Programmable Logic and Microprocessor-Based Systems Design Lecture and Lab (4 units).
  • CPE 400 Special Problems for Advanced Undergraduates (1-4 units)
  • CPE 450 CPE Capstone Project (4 units)
  • CPE 461 & 462 Senior Project I, II (3 units and 2 units)
  • CPE 493, 494, 495 Cooperative Education Experience (2 units, 6 units, and 12 units)
  • EE 111 Introduction to Electrical Engineering (1 unit).
  • EE 400 Special Problems for Advanced Undergraduates (1–5 units)
  • EE 461 & 462 Senior Project I, II (3 units and 2 units)
  • EE 463 & 464 Senior Project Design Laboratory I, II (3 units and 2 units)
  • EE 521 Computer Systems (4 units).
  • EE 522 Microprocessor-Based Digital System Design (4 units).
  • EE 523 Digital Systems Design Graduate course with independent study project (3 units).
  • EE 599 Design Project (Thesis) (1-9 units)

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